Deep Research

Initial M5 Ultra Benchmarks Surface: High-Performance Local Inference Potential

Early performance data for the M5 Ultra chip has appeared on the OMLX benchmark portal, showcasing impressive throughput for local LLM inference. The data highlights significant token generation speeds for the Qwen 3.8 27B model, signaling a potential shift in local hardware capabilities.

The AI Multiverse Editorial Desk•Thursday, September 17, 2026•2 min read

Reported viaReddit LocalLLaMA (Model Leaks & Local AI)

Reader:

Executive Brief & 3-Point Takeaways

M5 Ultra achieves 50 tok/s on Qwen 3.8 27B (q4) at 8k context.

Prompt processing speeds reached 1800 tok/s in initial testing.

Performance metrics were achieved without the use of Multi-Token Prediction (MTP).

Impact:

These benchmarks suggest that specialized local hardware is reaching performance thresholds that could make running large-scale, high-parameter models locally more viable for enterprise and developer workflows.

Fact-checked against primary sourcesCategory: Deep Research

Initial M5 Ultra Benchmarks Surface: High-Performance Local Inference Potential

Illustration: AI-generated

Key Findings & Takeaways

M5 Ultra achieves 50 tok/s on Qwen 3.8 27B (q4) at 8k context.
Prompt processing speeds reached 1800 tok/s in initial testing.
Performance metrics were achieved without the use of Multi-Token Prediction (MTP).

Why It Matters

Key Details

Recent data published on the OMLX benchmark platform provides the first look at the M5 Ultra's performance metrics. Testing focused on the Qwen 3.8 27B model using a 4-bit quantization (q4) at an 8k context window. The reported figures indicate 50 tokens per second (tok/s) for token generation and 1800 tok/s for prompt processing (pp), achieved without the use of MTP (Multi-Token Prediction).

Technical Architecture

The M5 Ultra appears to be optimized for high-bandwidth memory and efficient tensor processing, allowing it to handle 27B parameter models with notable speed. The absence of MTP in these specific tests suggests that the raw inference throughput is driven by the chip's underlying silicon architecture rather than software-level prediction optimizations.

What to Expect

While these benchmarks are early and require further verification, they indicate that the M5 Ultra is a strong contender in the local AI hardware space. Developers should monitor future updates to see how the chip handles larger context windows and more complex model architectures as more official documentation becomes available.